ECE 211 · Lecture 6: Operational Amplifiers

§1 · The operational amplifier

An active element that performs mathematics

The operational amplifier is an active circuit element: it requires a power supply and can deliver more signal power to its load than it receives at its inputs. When external components are connected to its terminals, the amplifier performs a mathematical operation on the input signals. The catalog of operations is broad.

sum signals amplify integrate differentiate

Internally the device is built from transistors, resistors, and capacitors, and a single package may contain dozens of them. For circuit analysis, however, the internal detail is set aside: the amplifier is treated as a black box described by an idealized terminal model, and the question of interest is how to use it in a circuit.

The amplifier symbol. The inverting input $V_n$ and the non-inverting input $V_p$ enter at the left; the output $V_o$ leaves at the apex. The two supply rails $+V_{dc}$ and $-V_{dc}$ deliver the power, and a common ground provides the reference for every voltage.

The ideal operational amplifier

Three idealizations define the model used throughout this course. Each is the limiting case of a real device property, and each has a direct analytical consequence, developed in the next section.

1 · infinite open-loop gain 2 · infinite input resistance 3 · zero output resistance

§2 · The three working rules

What the ideal model buys

The three idealizations are not used directly. Each is converted into a working rule that makes op-amp circuits solvable by nodal analysis. The conversion assumes that the amplifier is operating with negative feedback, that is, with a path from the output back to the inverting input; without it, the rules below do not hold.

The two consequences that drive the analysis: the input terminals are forced to the same voltage, $V_n = V_p$ , and no current enters either input. The output current $I$ is whatever the load demands and is left unknown.

\tm{ru.short}{V_n = V_p}

Infinite open-loop gain forces the two input voltages together. The output adjusts itself, through the feedback path, until the difference $V_p - V_n$ is driven to zero. The inputs are therefore held at a common voltage even though no wire connects them, a condition named the virtual short. This is the single most useful fact about the ideal amplifier: one input voltage is known the instant the other is known.

\tm{ru.iin}{I_n = I_p = 0}

Infinite input resistance forces the input currents to zero. No current enters the inverting or the non-inverting terminal, so every current that arrives at an input node from the external resistors must leave through the other external resistors. This is what makes a node equation at an input node closed and solvable.

Negative feedback is a precondition, not a separate rule. The first two rules describe what the amplifier does once the output has settled; the settling is accomplished by the feedback path, which returns a fraction of the output to the inverting input and lets the amplifier correct any residual input difference. A circuit drawn without such a path cannot be analyzed with the virtual short.

Where KCL may and may not be written

The analysis proceeds by nodal analysis, subject to two prohibitions that follow from the model.

No KCL at an output node. The output current is set by the load and is unknown, so a node equation at $V_o$ would introduce an unknown that no other equation removes. Output-node voltages are solved for, never summed at.
No KCL at the ground node, ever. The ground carries the return current of the entire circuit, including the amplifier supply currents, which are not represented on the schematic. A sum at ground can never be closed.

§3 · Worked example: the Thevenin voltage

Two amplifiers, one open-circuit voltage

The Thevenin equivalent seen at the port $a$ - $b$ is sought for the two-amplifier network below. The open-circuit voltage is found first. The strategy is entirely nodal: each virtual short fixes an inverting-input node from a known non-inverting input, and one node equation is then written at each such node and at the open port.

The circuit and the target

The port $a$ - $b$ is open, so $V_T$ is the voltage across it. The left amplifier OA1 and the right amplifier OA2 each carry a resistive network on the inverting side and a fixed reference on the non-inverting side.

The virtual shorts fix two node voltages

The non-inverting input of OA1 is held at 50 V by the 2 A source across the 25 Ω resistor ( $2\,\text{A} \times 25\,\Omega = 50$ V), so the inverting node is also at 50 V. The non-inverting input of OA2 is held at 5 V by the 5 V source, so its inverting node is at 5 V. The 5 Ω resistor at that input carries no current and passes the 5 V through unchanged.

KCL at the open port node $V_3$

The port node $V_3$ is terminal $a$ . It connects only through the 20 Ω resistor to the 50 V node and the 40 Ω resistor to the 5 V node, and the port draws no current, so

\tm{th.r20a}{\frac{V_3 - 50}{20}} + \tm{th.r40}{\frac{V_3 - 5}{40}} = 0 \;\Longrightarrow\; 2V_3 - 100 + V_3 - 5 = 0 \;\Longrightarrow\; \boxed{V_3 = 35\ \text{V}}

KCL at the 50 V node gives $V_1$

No current enters OA1, so the currents leaving the 50 V node through the 5 Ω, 10 Ω, and 20 Ω resistors sum to zero. The unknown $V_1$ is the output of OA1.

\tm{th.r5}{\frac{50 - 0}{5}} + \tm{th.r10a}{\frac{50 - V_1}{10}} + \tm{th.r20a}{\frac{50 - V_3}{20}} = 0 \;\Longrightarrow\; 200 + 100 - 2V_1 + 50 - V_3 = 0

With $V_3 = 35$ V, this reduces to $350 - 2V_1 - 35 = 0$ , hence $\boxed{V_1 = 315/2 = 157.5\ \text{V}}$ .

KCL at the 5 V node gives $V_2$

The same reasoning applies at the inverting node of OA2. The output $V_2$ is terminal $b$ , and the 40 Ω, 20 Ω, and 10 Ω resistors carry the node current.

\tm{th.r40}{\frac{5 - V_3}{40}} + \tm{th.r20b}{\frac{5 - V_2}{20}} + \tm{th.r10b}{\frac{5 - V_1}{10}} = 0

Substituting $V_3 = 35$ V and $V_1 = 157.5$ V gives $-0.75 + (5 - V_2)/20 - 15.25 = 0$ , hence $5 - V_2 = 320$ and $\boxed{V_2 = -315\ \text{V}}$ .

The Thevenin voltage

The port voltage is the difference between the two terminal nodes:

V_T = V_3 - V_2 = 35 - (-315) = \boxed{350\ \text{V}}

The large value is a direct consequence of the amplifier gains; the passive network alone could never produce it. Both terminal voltages were obtained without a single equation at an output or at ground.

§4 · The looking-in resistance

A test source with the sources turned off

The Thevenin resistance cannot be read off by series and parallel combination, because the amplifiers are active. It is measured instead: the independent sources are turned off, a 1 V test source is applied at the port, and the current it delivers is computed. The resistance is the ratio $R_T = 1/I_x$ .

Turn off the independent sources

The 2 A source becomes an open circuit and the 5 V source becomes a short circuit. Each non-inverting input is thereby grounded, so both virtual shorts now pin their inverting nodes to 0 V. The two former 50 V and 5 V nodes become the left and right zero-volt nodes.

Apply the 1 V test source

A 1 V source is connected across the port, so the two terminal voltages differ by exactly 1 V: $V_a = V_b + 1$ . The current $I_x$ delivered into terminal $a$ is the unknown of interest.

KCL at the left zero node

The left node sits at 0 V and admits no current into OA1. The 5 Ω resistor to ground carries nothing, so only the 20 Ω resistor to terminal $a$ and the 10 Ω feedback resistor to $V_1$ remain:

\frac{0 - V_a}{20} + \frac{0 - V_1}{10} = 0 \;\Longrightarrow\; V_1 = -\frac{V_a}{2}

KCL at the right zero node closes the system

The right node, also at 0 V, connects through the 40 Ω resistor to $V_a$ , the 10 Ω resistor to $V_1$ , and the 20 Ω resistor to $V_b$ :

\frac{0 - V_a}{40} + \frac{0 - V_1}{10} + \frac{0 - V_b}{20} = 0 \;\Longrightarrow\; V_a = 2 V_b

With $V_a = V_b + 1$ , this gives $V_b = 1$ V and $V_a = 2$ V.

The delivered current and the resistance

All of the test current enters terminal $a$ and leaves through the two resistors tied to it:

I_x = \frac{V_a}{20} + \frac{V_a}{40} = \frac{2}{20} + \frac{2}{40} = \frac{3}{20}\ \text{A} \qquad R_T = \frac{1\ \text{V}}{I_x} = \boxed{\frac{20}{3}\ \Omega \approx 6.67\ \Omega}

The resistance is positive here, so the network as seen at this port behaves like an ordinary source. Section 7 exhibits a port where it does not.

§5 · Maximum power to a load

The matched load and the ceiling

With the equivalent in hand ( $V_T = 350$ V, $R_T = 20/3\ \Omega$ ), a load resistor $R_L$ placed at the port receives $P_L = V_L I_L = I_L^2 R_L = V_L^2/R_L$ . As established in Lecture 5, the load power is maximized when the load is matched to the source resistance, and the ceiling follows by substitution.

P_L = V_T^2\,\frac{R_L}{(R_L + R_T)^2} \qquad R_L = R_T \;\Longrightarrow\; P_{L,\max} = \frac{V_T^2}{4 R_T} = \frac{350^2}{4 \cdot 20/3} = 4593.75\ \text{W}

The sliders below drive the equivalent from this example. The moving dots represent the load current, and the marker rides the power curve; the peak sits exactly at the matched load.

The equivalent drives [R_L]{mp.rl}; the current [I_L]{mp.il} and the voltage [V_L]{mp.vl} both follow from R_L.

P_L against R_L. The peak sits at R_L = R_T = 20/3 Ω ≈ 6.67 Ω.

R_L (Ω) 6.7

I_L = 350 V6.67 Ω + 6.7 Ω = 26.24 A P_L = I_L² · R_L = 4593.7 W (100.0 % of the maximum)

Consistency check from the Norton form

The Norton current is $I_N = V_T / R_T = 350 / (20/3) = 52.5$ A. With the matched load in parallel with $R_T$ , the source current splits equally, so $I_L = 26.25$ A and

P_L = I_L^2 R_L = (26.25)^2 \cdot \frac{20}{3} = 4593.75\ \text{W} \;\checkmark

The two forms agree, which is the expected result: the Thevenin and Norton equivalents are the same network described two ways.

§6 · A second output by inspection

Two virtual shorts hand over two node voltages

The next network is solved almost entirely by writing down what the virtual shorts already provide. The current source with the 1 kΩ resistor sets one non-inverting input, the 5 V source sets the other, and two node equations then deliver the answer.

The current source sets the first input

The 10 mA source drives the 1 kΩ resistor, and no current enters the amplifier, so the entire 10 mA flows through the resistor: $10\,\text{mA} \times 1\,\text{k}\Omega = 10$ V at the non-inverting input. The virtual short then pins the inverting node to 10 V.

The 5 V source sets the second input

The 5 V source holds the non-inverting input of the right amplifier at 5 V, so its inverting node sits at 5 V as well. Two node voltages are now known before any equation has been written.

KCL at the 10 V node gives $V_x$

The 10 V node connects to ground through 20 Ω, to the 5 V node through 20 Ω, and to the middle node $V_x$ through 16 Ω:

\tm{vo.r20g}{\frac{10 - 0}{20}} + \tm{vo.r20m}{\frac{10 - 5}{20}} + \tm{vo.r16}{\frac{10 - V_x}{16}} = 0 \;\Longrightarrow\; \frac{1}{2} + \frac{1}{4} + \frac{10 - V_x}{16} = 0

Hence $10 - V_x = -12$ and $\boxed{V_x = 22\ \text{V}}$ .

KCL at the 5 V node gives $V_o$

The 5 V node connects to the 10 V node through 20 Ω, to the output $V_o$ through 24 Ω, and to $V_x$ through 34 Ω:

\tm{vo.r20m}{\frac{5 - 10}{20}} + \tm{vo.r24}{\frac{5 - V_o}{24}} + \tm{vo.r34}{\frac{5 - V_x}{34}} = 0

With $V_x = 22$ V, the third term is $(5 - 22)/34 = -1/2$ , so $-1/4 + (5 - V_o)/24 - 1/2 = 0$ , giving $5 - V_o = 18$ and $\boxed{V_o = -13\ \text{V}}$ .

§7 · A negative looking-in resistance

When the port supplies power

The final network shows that the test-source method can return a negative resistance. The independent 2 A source is turned off, a 1 V test source is applied at the port, and the current it delivers is again computed. Both amplifiers ground their non-inverting inputs once the source is off, so both inverting nodes are held at 0 V.

The test source and the two zero nodes

Terminal $a$ coincides with the left inverting node, which the virtual short holds at 0 V. The 1 V source then places terminal $b$ at $-1$ V. The current $I_x$ delivered by the source is sought.

KCL at the right zero node gives $V_x$

The right inverting node, at 0 V, connects to the middle node $V_x$ through 10 Ω and to terminal $b$ through 5 Ω:

\tm{nr.r10}{\frac{0 - V_x}{10}} + \tm{nr.r5}{\frac{0 - (-1)}{5}} = 0 \;\Longrightarrow\; -V_x + 2 = 0 \;\Longrightarrow\; \boxed{V_x = 2\ \text{V}}

KCL at the left zero node gives $I_x$

The left node, also at 0 V, connects to $V_x$ through 20 Ω, to terminal $b$ through 30 Ω, and delivers $I_x$ to the source:

\tm{nr.r20}{\frac{0 - V_x}{20}} + \tm{nr.r30}{\frac{0 - (-1)}{30}} - I_x = 0 \;\Longrightarrow\; -\frac{2}{20} + \frac{1}{30} = I_x \;\Longrightarrow\; \boxed{I_x = -\frac{1}{15}\ \text{A}}

A negative resistance

The port voltage is 1 V and the delivered current is negative, so

R_T = \frac{V_a - V_b}{I_x} = \frac{1\ \text{V}}{-1/15\ \text{A}} = \boxed{-15\ \Omega}

Negative resistance is physical here

Active circuits, those containing operational amplifiers or dependent sources, can present a negative Thevenin resistance at a port. The sign is not an error: it indicates that the network supplies power to whatever is connected there rather than absorbing it. A passive network of resistors alone can never do this, and its looking-in resistance is always nonnegative.